Bit Flip Reduction in Non-volatile Memories
Speaker: Daniel Bittman
The advent of byte-addressable non-volatile memory technologies such as phase change memory (PCM) has spurred a flurry of research on topics including consistency and durability of data structures across power failures and optimizing systems for the low-latency nature of these technologies, while typically aiming to increase lifetime and reduce power consumption by reducing the number of writes to the non-volatile memory. However, in technologies such as PCM, it is bit flips that consume power and wear out cells, not writes. Thus, PCM controllers do not rewrite cells unless the cell should change. However, this crucial optimization, reducing the number of bits flipped, has not been sufficiently explored for the rest of the hardware and software stack. We have developed a framework and full-system simulator to investigate how different software and hardware techniques affect the number of bit flips done by applications, data structures, and algorithms. By defining number of bit flips as a measure of “goodness”, we can evaluate existing and new data structures with this criterion to better inform the design of systems for non-volatile memory.
Using our framework, we have found several simple, straightforward, and effective modifications to existing data structures that can reduce bit flips over time. We profile use cases where the approach of minimizing writes does not does not also minimize bit flips. These approaches, and others, can be used to guide optimizations for non-volatile memory systems. We also examined the effects of caching and explicit flushing on bit flip behaviors over prolonged periods of time. By looking at the effects of normal program operation (e.g. register spilling), we were able to recommend backwards-compatible changes to ABIs that would reduce bit flips under certain circumstances. We expect there to be significant research paths forward, both in identifying the bit flipping behavior of existing algorithms and data structures, and in designing new algorithms and data structures to minimize bit flips.